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EASY: Efficient Arbiter SYnthesis from Multi-threaded Code.

, , , , и . FPGA, стр. 142-151. ACM, (2019)

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Jianyi Zhao

Jianyi Kong

Cheng-Yung Cheng

Ying Min Cheng

I-Fen Cheng

 

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Probabilistic Scheduling in High-Level Synthesis., , и . FCCM, стр. 195-203. IEEE, (2021)Combining Dynamic & Static Scheduling in High-level Synthesis., , , , и . FPGA, стр. 288-298. ACM, (2020)Building a comprehensive syntactic and semantic corpus of Chinese clinical texts., , , , , , , и . CoRR, (2016)EASY: Efficient Arbiter SYnthesis from Multi-threaded Code., , , , и . FPGA, стр. 142-151. ACM, (2019)Probabilistic Optimization for High-Level Synthesis., , и . FPGA, стр. 145. ACM, (2021)ScaleHLS: Scalable High-Level Synthesis through MLIR., , , , , , и . CoRR, (2021)ScaleHLS: A New Scalable High-Level Synthesis Framework on Multi-Level Intermediate Representation., , , , , , и . HPCA, стр. 741-755. IEEE, (2022)POLSCA: Polyhedral High-Level Synthesis with Compiler Transformations., , , и . FPL, стр. 235-242. IEEE, (2022)Revisiting Block-based Quantisation: What is Important for Sub-8-bit LLM Inference?, , , , и . EMNLP, стр. 9988-10006. Association for Computational Linguistics, (2023)SEER: Super-Optimization Explorer for High-Level Synthesis using E-graph Rewriting., , , , и . ASPLOS (2), стр. 1029-1044. ACM, (2024)