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Design space exploration of workload-specific last-level caches., , , , и . ISLPED, стр. 243-248. ACM, (2012)A low latency router supporting adaptivity for on-chip interconnects., , , , и . DAC, стр. 559-564. ACM, (2005)Design and analysis of an NoC architecture from performance, reliability and energy perspective., , , , и . ANCS, стр. 173-182. ACM, (2005)Programmable Non-Volatile Memory Design Featuring Reconfigurable In-Memory Operations., , , , и . ISCAS, стр. 1-5. IEEE, (2019)A Dual-VDD Low Power FPGA Architecture., , , , , и . FPL, том 3203 из Lecture Notes in Computer Science, стр. 145-157. Springer, (2004)Power-efficient implementation of turbo decoder in SDR system., , , и . SoCC, стр. 119-122. IEEE, (2004)ChipPower: an architecture-level leakage simulator., , , , и . SoCC, стр. 395-398. IEEE, (2004)Improving energy efficiency of multi-threaded applications using heterogeneous CMOS-TFET multicores., , , , , и . ISLPED, стр. 247-252. IEEE/ACM, (2011)Hardware and Software Techniques for Controlling DRAM Power Modes., , , , и . IEEE Trans. Computers, 50 (11): 1154-1173 (2001)Influence of compiler optimizations on system power., , , и . DAC, стр. 304-307. ACM, (2000)