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Algorithms for scheduling task-based applications onto heterogeneous many-core architectures., and . HPEC, page 1-6. IEEE, (2014)Solving Covering Problems Using LPR-Based Lower Bounds., and . DAC, page 117-120. ACM Press, (1997)Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures., , and . DAC, page 287-292. ACM Press, (1997)GENIE: a generalized array optimizer for VLSI synthesis., and . DAC, page 631-637. IEEE Computer Society Press, (1986)Tardis 2.0: An Optimized Time Traveling Coherence Protocol., and . CoRR, (2015)Access-Controlled Resource Discovery for Pervasive Networks., , , , and . SAC, page 338-345. ACM, (2003)Irredundant interacting sequential machines via optimal logic synthesis., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 10 (3): 311-325 (1991)MUSTANG: state assignment of finite state machines targeting multilevel logic implementations., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 7 (12): 1290-1300 (1988)Secure and Robust Error Correction for Physical Unclonable Functions., and . IEEE Des. Test Comput., 27 (1): 48-65 (2010)Computation of floating mode delay in combinational circuits: theory and algorithms., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (12): 1913-1923 (1993)