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Disambiguation of "Katevenis, Manolis"

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Towards Exascale: Measuring the Energy Footprint of Astrophysics HPC Simulations.

, , , , , , , , , , , and . eScience, page 403-412. IEEE, (2019)

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Manolis Skarsoulis

Manolis Kamvysselis

Konstantin Manolis

Manolis Fanto

Manolis Pasparakis

 

Other publications of authors with the same name

On-chip communication and synchronization mechanisms with cache-integrated network interfaces., , , and . Conf. Computing Frontiers, page 217-226. ACM, (2010)FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability., , , , , , and . ICSAMOS, page 149-156. IEEE, (2009)VLSI micro-architectures for high-radix crossbar schedulers., , and . NOCS, page 217-224. ACM/IEEE Computer Society, (2011)User-Level DMA without Operating System Kernel Modification., and . HPCA, page 322-331. IEEE Computer Society, (1997)The Next Generation of Exascale-Class Systems: The ExaNeSt Project., , , , , , , , , and 8 other author(s). DSD, page 510-515. IEEE Computer Society, (2017)Towards Exascale: Measuring the Energy Footprint of Astrophysics HPC Simulations., , , , , , , , , and 2 other author(s). eScience, page 403-412. IEEE, (2019)Building an FoC Using Large, Buffered Crossbar Cores., , and . IEEE Des. Test Comput., 25 (6): 538-548 (2008)A Vector Hardware Accelerator with Circuit Simulation Emphasis., , , , , , , , and . DAC, page 89-94. IEEE Computer Society Press / ACM, (1987)A Systematic Evaluation of Emerging Mesh-like CMP NoCs., , , , , , and . ANCS, page 159-170. IEEE Computer Society, (2015)Variable-size multipacket segments in buffered crossbar (CICQ) architectures., and . ICC, page 999-1004. IEEE, (2005)