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Leveraging value locality for efficient design of a hybrid cache in multicore processors., , , and . ICCAD, page 1-8. IEEE, (2017)Using data replication to reduce communication energy on chip multiprocessors., , , and . ASP-DAC, page 769-772. ACM Press, (2005)Optimizing embedded applications using programmer-inserted hints., and . ASP-DAC, page 157-160. ACM Press, (2005)Adaptive prefetching for shared cache based chip multiprocessors., , and . DATE, page 773-778. IEEE, (2009)Selective Caching: Avoiding Performance Valleys in Massively Parallel Architectures., , and . PDP, page 290-298. IEEE, (2020)Multiverse: Dynamic VM Provisioning for Virtualized High Performance Computing Clusters., , , , , and . CCGRID, page 131-141. IEEE, (2020)Optimising power efficiency in trace cache fetch unit., , , and . IET Comput. Digit. Tech., 1 (4): 334-348 (2007)Network footprint reduction through data access and computation placement in NoC-based manycores., , , and . DAC, page 181:1-181:6. ACM, (2015)Hybrid-comp: A criticality-aware compressed last-level cache., , , and . ISQED, page 25-30. IEEE, (2018)Array Unification: A Locality Optimization Technique.. CC, volume 2027 of Lecture Notes in Computer Science, page 259-273. Springer, (2001)