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Disambiguation of "De, Vivek"

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A Dual-Vt Layout Approach for Statistical Leakage Variability Minimization in Nanometer CMOS.

, , , and . ICCD, page 567-573. IEEE Computer Society, (2005)

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Nagarajavel Vivekananthan

Vivek Venkataramani

Vivek Ramamurthy

Vivek Bose

Vivek Shetty

 

Other publications of authors with the same name

8.1 Improved power-side-channel-attack resistance of an AES-128 core via a security-aware integrated buck voltage regulator., , , , , and . ISSCC, page 142-143. IEEE, (2017)Invited paper: Low power requirements and side-channel protection of encryption engines: Challenges and opportunities., , , , , and . ISLPED, page 1-2. IEEE, (2017)F1: Designing secure systems: Manufacturing, circuits and architectures., , , , , , and . ISSCC, page 492-494. IEEE, (2016)A solar-powered 280mV-to-1.2V wide-operating-range IA-32 processor., , and . ICICDT, page 1-4. IEEE, (2014)Low power and high performance design challenges in future technologies., and . ACM Great Lakes Symposium on VLSI, page 1-6. ACM, (2000)A 280mV-to-1.2V wide-operating-range IA-32 processor in 32nm CMOS., , , , , , , , , and 11 other author(s). ISSCC, page 66-68. IEEE, (2012)20.1 A digitally controlled fully integrated voltage regulator with on-die solenoid inductor with planar magnetic core in 14nm tri-gate CMOS., , , , , , , , , and . ISSCC, page 336-337. IEEE, (2017)Life is CMOS: why chase the life after?, , and . DAC, page 78-83. ACM, (2002)Design and reliability challenges in nanometer technologies., , and . DAC, page 75. ACM, (2004)A Modular Hybrid LDO with Fast Load-Transient Response and Programmable PSRR in 14nm CMOS Featuring Dynamic Clamp Tuning and Time-Constant Compensation., , , , , , , and . ISSCC, page 234-236. IEEE, (2019)