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Другие публикации лиц с тем же именем

Effect-cause intra-cell diagnosis at transistor level., , , , , , и . ISQED, стр. 460-467. IEEE, (2013)A calculation method to estimate single event upset cross section., , , , , и . Microelectron. Reliab., (2017)Evaluation of the temperature influence on SEU vulnerability of DICE and 6T-SRAM cells., , , и . DTIS, стр. 1-5. IEEE, (2018)A study of path delay variations in the presence of uncorrelated power and ground supply noise., , , , , и . DDECS, стр. 189-194. IEEE Computer Society, (2011)On using a SPICE-like TSTAC™ eFlash model for design and test., , , , , , , , и . DDECS, стр. 359-364. IEEE Computer Society, (2011)Optimized march test flow for detecting memory faults in SRAM devices under bit line coupling., , , , , , и . DDECS, стр. 353-358. IEEE Computer Society, (2011)A Low-Cost Fault-Tolerant RISC-V Processor for Space Systems., , , , и . DTIS, стр. 1-5. IEEE, (2020)An effective ATPG flow for Gate Delay Faults., , , , , и . DTIS, стр. 1-6. IEEE, (2015)Resistive-Open Defects in Embedded-SRAM Core Cells: Analysis and March Test Solution., , , , , и . Asian Test Symposium, стр. 266-271. IEEE Computer Society, (2004)Delay Fault Diagnosis in Sequential Circuits., , , , , , и . Asian Test Symposium, стр. 355-360. IEEE Computer Society, (2009)