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A harmonic-free cell-based all-digital delay-locked loop for die-to-die clock synchronization of 3-D IC.

T. Xu, F. Xue, Z. Cai, X. Liu, and S. Meng. ASICON, page 167-170. IEEE, (2017)

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Jian Cai

Yongjie Cai

Jiehua Cai

Jie Cai

Xuediao Cai

Other publications of authors with the same name

An improved BIJM circuit based on undersampling technique.Z. Cai, H. Xu, J. Xiao, and J. Yang. IEICE Electron. Express, 15 (8): 20180124 (2018)A harmonic-free cell-based all-digital delay-locked loop for die-to-die clock synchronization of 3-D IC.T. Xu, F. Xue, Z. Cai, X. Liu, and S. Meng. ASICON, page 167-170. IEEE, (2017)A Novel BIST Algorithm for Low-Voltage SRAM.Z. Cai, Y. Wang, S. Liu, K. Lv, and Z. Wang. ITC-Asia, page 133-138. IEEE, (2019)An all-digital phase-locked loop with a PGTA-based TDC and a 0.6-V DCO.Z. Wang, H. Ding, H. Xu, C. Zhang, S. Hu, X. Ji, X. Xia, and Z. Cai. IEICE Electron. Express, 15 (22): 20180889 (2018)An effective technique preventing differential cryptanalysis attack.M. Wang, J. Xiao, and Z. Cai. ATS, page 1-6. IEEE, (2020)Built-in jitter measurement circuit for PLL based on variable vernier delay line.Z. Cai, H. Xu, S. Hu, and J. Yang. IEICE Electron. Express, 14 (3): 20161116 (2017)A low-power 2.4-GHz receiver front-end with a complementary series feedback LNA and a current-reused passive down-converter based on gm-boosted TIA for WSN applications.D. Zhu, Y. Wang, C. Peng, H. Pan, and Z. Cai. IEICE Electron. Express, 17 (23): 20200353 (2020)Design of Low-Cost Ground Penetrating Radar Receiving Circuit Based on Equivalent Sampling.Z. Cai, W. Lin, X. Qi, and J. Xiao. ISCAS, page 1-4. IEEE, (2019)A wide-range and ultra fast-locking all-digital SAR DLL without harmonic-locking.Z. Cai, T. Xu, H. Sun, and L. Shi. IEICE Electron. Express, 10 (22): 20130494 (2013)An optimized DFT technology based on machine learning.H. Yang, Z. Zhao, and Z. Cai. ITC-Asia, page 1-4. IEEE, (2021)

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Disambiguation of "Cai, Zhikuang"

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A harmonic-free cell-based all-digital delay-locked loop for die-to-die clock synchronization of 3-D IC.

Please choose a person to relate this publication to

Jian Cai

Yongjie Cai

Jiehua Cai

Jie Cai

Xuediao Cai

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Cai, Zhikuang"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A harmonic-free cell-based all-digital delay-locked loop for die-to-die clock synchronization of 3-D IC.

Please choose a person to relate this publication to

Jian Cai

Yongjie Cai

Jiehua Cai

Jie Cai

Xuediao Cai

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A harmonic-free cell-based all-digital delay-locked loop for die-to-die clock synchronization of 3-D IC.