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Disambiguation of "Ahonen, Tapani"

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Design, implementation and analysis of a run-time configurable Memory Management Unit on FPGA.

, , , and . NORCAS, page 1-8. IEEE, (2015)

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Pertti Ahonen

Tapani Hietaniemi

Timo Ahonen

Tapani Huovila

Markku Tapani Patjas

 

Other publications of authors with the same name

Integration issues of a run-time configurable memory management unit to a RISC processor on FPGA., , , and . Microprocess. Microsystems, (2017)Implementation of W-CDMA Cell Search on a Highly Parallel and Scalable MPSoC., , , , and . J. Signal Process. Syst., 64 (1): 137-148 (2011)MPSoC based on Transport Triggered Architecture for baseband processing of an LTE receiver., , and . J. Syst. Archit., 60 (1): 140-149 (2014)Topology optimization for application-specific networks-on-chip., , , and . SLIP, page 53-60. ACM, (2004)Applying CDMA Technique to Network-on-Chip., , and . IEEE Trans. Very Large Scale Integr. Syst., 15 (10): 1091-1100 (2007)FPGA implementation and integration of a reconfigurable CAN-based co-processor to the coffee risc processor., , , and . NORCAS, page 1-6. IEEE, (2016)Accelerating Computation on an Android Phone with OpenCL Parallelism and Optimizing Workload Distribution between a Phone and a Cloud Service., , and . UIC/ATC/ScalCom/CBDCom/IoP/SmartWorld, page 636-642. IEEE Computer Society, (2016)Design, implementation and analysis of a run-time configurable Memory Management Unit on FPGA., , , and . NORCAS, page 1-8. IEEE, (2015)Implementation of the W-CDMA cell search on a MPSOC designed for software defined radios., , , , and . SiPS, page 030-035. IEEE, (2009)Energy and power estimation of Coarse-Grain Reconfigurable Array based Fast Fourier Transform accelerators., , , and . ReCoSoC, page 1-4. IEEE, (2012)