From post

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

 

Другие публикации лиц с тем же именем

An Efficient Embedded Bitstream Parsing Processor for MPEG-4 Video Decoding System., , , и . VLSI Signal Processing, 41 (2): 183-191 (2005)VLSI Architecture for Lifting-Based Shape-Adaptive Discrete Wavelet Transform with Odd-Symmetric Filters., , и . VLSI Signal Processing, 40 (2): 175-188 (2005)Pipeline interleaving design for FIR, IIR, and FFT array processors., , и . VLSI Signal Processing, 10 (3): 275-293 (1995)A VLSI architecture design of VLC encoder for high data rate video/image coding., , , и . ISCAS (4), стр. 398-401. IEEE, (1999)Low power full-search block-matching motion estimation chip for H.263+., , , и . ISCAS (4), стр. 299-302. IEEE, (1999)Analysis and design of macroblock pipelining for H.264/AVC VLSI architecture., , и . ISCAS (2), стр. 273-276. IEEE, (2004)The Chip Design of A 32-b Logarithmic Number System., , и . ISCAS, стр. 167-170. IEEE, (1994)Low-cost hardware architecture design for 3D warping engine in multiview video applications., , и . ISCAS, стр. 2964-2967. IEEE, (2010)Analysis of EBCOT decoding algorithm and its VLSI implementation for JPEG 2000., , , и . ISCAS (4), стр. 329-332. IEEE, (2002)System Bandwidth Analysis of Multiview Video Coding with Precedence Constraint., , , , , и . ISCAS, стр. 1001-1004. IEEE, (2007)