Author of the publication

Design and performance evaluation of a Programmable Packet Processing Engine (PPE) suitable for high-speed network processors units.

, , , , , , and . Microprocess. Microsystems, 31 (3): 188-199 (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A novel embedded system for vision tracking., , and . DATE, page 1-4. European Design and Automation Association, (2014)Acceleration of Data Streaming Classification using Reconfigurable Technology., , , and . ARC, volume 9040 of Lecture Notes in Computer Science, page 357-364. Springer, (2015)An Embedded Networking SoC for purely Ethernet MANs/WANs., , , , and . ISCC, page 901-906. IEEE Computer Society, (2007)High-End Reconfigurable Systems for Fast Windows' Password Cracking., , and . FCCM, page 287-290. IEEE Computer Society, (2009)ROTA: An Archipelago-Wide Area Network for High Speed Communication to Ships., , , , , , , , , and 1 other author(s). Panhellenic Conference on Informatics, page 271-275. IEEE Computer Society, (2012)An FPGA-based parallel processor for Black-Scholes option pricing using finite differences schemes., , and . DATE, page 709-714. IEEE, (2012)Queue Management in Network Processors., , , , , and . DATE, page 112-117. IEEE Computer Society, (2005)Accelerating ATM: on-line compression of ATM streams.. IPCCC, page 233-239. IEEE, (1999)A novel low-power embedded object recognition system working at multi-frames per second (Extended abstract)., , and . ESTIMedia, page 85. IEEE Computer Society, (2012)Performance against cost trade-offs for hardware compression in 10 Gigabit networks., and . ICECS, page 527-530. IEEE, (2003)