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Disambiguation of "Nakatake, Shigetoshi"

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Channel-driven global routing with consistent placement (extended abstract).

, and . ICCAD, page 350-355. IEEE Computer Society / ACM, (1994)

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Other publications of authors with the same name

Consistent floorplanning with super hierarchical constraints., , and . ISPD, page 144-149. ACM, (2001)Layout-aware variation evaluation of analog circuits and its validity on op-amp designs., , , , , and . ACM Great Lakes Symposium on VLSI, page 247-252. ACM, (2011)Post-placement STI well width adjusting by geometric programming for device mobility enhancement in critical path., , , and . ISCAS, page 929-932. IEEE, (2010)Sequence-Pair Based Compaction under Equi-Length Constraint., , , and . APCCAS, page 1015-1018. IEEE, (2006)Abstraction and optimization of consistent floorplanning with pillar block constraints., , , and . ASP-DAC, page 19-24. IEEE Computer Society, (2004)Low-Power and Low-Variability Programmable Delay Element and Its Application to Post-Silicon Skew Tuning., , , and . ISVLSI, page 167-171. IEEE Computer Society, (2015)The channeled-BSG: a universal floorplan for simultaneous place/route with IC applications., , , and . ICCAD, page 418-425. ACM / IEEE Computer Society, (1998)A retargeting methodology of nano-watt CMOS reference circuit based on advanced compact MOSFET model., , , , and . ISCAS, page 938-941. IEEE, (2012)Practicality on placement given by optimality of packing.. ISPD, page 59-60. ACM, (2013)Regularity-oriented analog placement with diffusion sharing and well island generation., , , , , , and . ASP-DAC, page 305-311. IEEE, (2010)