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Virtual-Cache: A cache-line borrowing technique for efficient GPU cache architectures.

B. Li, J. Wei, and N. Kim. Microprocess. Microsystems, (September 2021)

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Wei Wei

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Dual Processing Engine Architecture to Speed Up Optimal Ate Pairing on FPGA Platform.Z. Hao, W. Guo, J. Wei, and D. Sun. Trustcom/BigDataSE/ISPA, page 584-589. IEEE, (2016)A High Efficient Control Flow Authentication Method Basing on Loop Isolation.Q. Wang, W. Guo, D. Sun, and J. Wei. NCCET, volume 600 of Communications in Computer and Information Science, page 96-103. Springer, (2017)Micro-architectural Features for Malware Detection.H. Peng, J. Wei, and W. Guo. ACA, volume 626 of Communications in Computer and Information Science, page 48-60. Springer, (2016)Analyzing graphics processor unit (GPU) instruction set architectures.K. Mayank, H. Dai, J. Wei, and H. Zhou. ISPASS, page 155-156. IEEE Computer Society, (2015)Design and implementation of co-design toolset for tcore processor.J. Wei, W. Guo, J. Sun, and Z. Shi. APCCAS, page 1664-1667. IEEE, (2008)Malware Detection with Convolutional Neural Network Using Hardware Events.W. Guo, T. Wang, and J. Wei. NCCET, volume 600 of Communications in Computer and Information Science, page 104-115. Springer, (2017)An optimized TTA-like vertex shader datapath for embedded 3D graphics processing unit.J. Wei, Y. Chang, W. Guo, and J. Sun. VLSI-SoC, page 188-191. IEEE, (2011)Design of a Configurable and Extensible Tcore Processor Based on Transport Triggered Architecture.W. Guo, J. Wei, Y. Yao, Z. Shi, and S. Wang. CSIE (3), page 536-540. IEEE Computer Society, (2009)Highly-parallel hardware implementation of optimal ate pairing over Barreto-Naehrig curves.T. Wang, W. Guo, and J. Wei. Integr., (2019)A Systematic Approach to Horizontal Clustering Analysis on Embedded RSA Implementation.F. Shi, J. Wei, D. Sun, and G. Wei. ICPADS, page 901-906. IEEE, (2019)

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Disambiguation of "Wei, Jizeng"

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Virtual-Cache: A cache-line borrowing technique for efficient GPU cache architectures.

Please choose a person to relate this publication to

Wei Wei

Wei Wei

Wei Wei

Wei Wei

Wei Wei

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Wei, Jizeng"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Virtual-Cache: A cache-line borrowing technique for efficient GPU cache architectures.

Please choose a person to relate this publication to

Wei Wei

Wei Wei

Wei Wei

Wei Wei

Wei Wei

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Virtual-Cache: A cache-line borrowing technique for efficient GPU cache architectures.