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A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS.

, , , , , , , , , , , , , , and . VLSIC, page 76-77. IEEE, (2012)

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A 14 b 23 MS/s 48 mW Resetting Sigma Delta ADC., and . IEEE Trans. Circuits Syst. I Regul. Pap., 58-I (6): 1167-1177 (2011)A 12b 70MS/s SAR ADC with digital startup calibration in 14nm CMOS., , , and . VLSIC, page 62-. IEEE, (2015)A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS., , , , , , , , , and 5 other author(s). VLSIC, page 76-77. IEEE, (2012)32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver., , , , , , , , , and 13 other author(s). ISSCC, page 62-64. IEEE, (2012)A 12MHz/38.4MHz Fast Start-Up Crystal Oscillator using Impedance Guided Chirp Injection in 22nm FinFET CMOS., , , , , , , , , and 1 other author(s). CICC, page 1-2. IEEE, (2021)A 6.0mW 3.8GS/s 7b VTC/TDC-Assisted Interleaved SAR ADC with 13GHz ERBW., , , , , , , , , and . VLSI Technology and Circuits, page 170-171. IEEE, (2022)A Fully Integrated 160Gb/s D-Band Transmitter with 1.1 pJ/b Efficiency in 22nm FinFET Technology., , , , , , , , , and 2 other author(s). ISSCC, page 78-80. IEEE, (2022)