Author of the publication

MPEG4 AVC/H.264 decoder with scalable bus architecture and dual memory controller.

, , , , and . ISCAS (2), page 145-148. IEEE, (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name