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A near-threshold 7T SRAM cell with high write and read margins and low write time for sub-20 nm FinFET technologies.

, , , , , and . Integr., (2015)

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G4-FET modeling for circuit simulation by adaptive neuro-fuzzy training systems., , , , and . IEICE Electron. Express, 9 (10): 881-887 (2012)Read static noise margin aging model considering SBD and BTI effects for FinFET SRAMs., , , , and . Microelectron. Reliab., (2016)The effect of noise and depolarization on hyperpolarized tracers perfusion assessment., , and . ISBI, page 137-140. IEEE, (2007)HPM: High-Precision Modeling of a Low-Power Inverter-Based Memristive Neural Network., , and . J. Circuits Syst. Comput., 30 (15): 2150274:1-2150274:19 (2021)An analytical model for read static noise margin including soft oxide breakdown, negative and positive bias temperature instabilities., , , and . Microelectron. Reliab., 53 (5): 670-675 (2013)Robust polysilicon gate FinFET SRAM design using dynamic back-gate bias., , and . DTIS, page 171-172. IEEE, (2013)A near-threshold 7T SRAM cell with high write and read margins and low write time for sub-20 nm FinFET technologies., , , , , and . Integr., (2015)A FinFET SRAM cell design with BTI robustness at high supply voltages and high yield at low supply voltages., , , and . Int. J. Circuit Theory Appl., 43 (12): 2011-2024 (2015)Modeling read SNM considering both soft oxide breakdown and negative bias temperature instability., , , and . Microelectron. Reliab., 52 (12): 2948-2954 (2012)Low Standby Power and Robust FinFET Based SRAM Design., , and . ISVLSI, page 185-190. IEEE Computer Society, (2008)