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Concurrent error detection in semi-systolic dual basis multiplier over GF(2m) using self-checking alternating logic.

C. Chiou, W. Liang, H. Chang, J. Lin, and C. Lee. IET Circuits Devices Syst., 4 (5): 382-391 (2010)

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Min-Ching Chiou

Irmgard Chiout

Emmanouil Chiou

Derek Chiou

Hannelore Chiout

Other publications of authors with the same name

Fast Optimal Normal Basis Multiplier with Type-2kw Over GF (2m).C. Chiou, J. Lin, and C. Lee. CASoN, page 116-120. IEEE Computer Society, (2010)Supporting Physical Agents in an Interactive e-book.J. Lin, C. Chiou, C. Lee, and J. Hsiao. ICGEC (2), volume 388 of Advances in Intelligent Systems and Computing, page 243-252. Springer, (2015)Partition Algorithm for Parallel Processing of Array Multiplication in Gf(2m) Fields.C. Chiou. Int. J. Comput. Math., 80 (7): 805-809 (2003)Low-complexity Gaussian normal basis multiplier over GF(2m).C. Chiou, H. Chang, W. Liang, C. Lee, J. Lin, and Y. Yeh. IET Inf. Secur., 6 (4): 310-317 (2012)Concurrent error detection in semi-systolic dual basis multiplier over GF(2m) using self-checking alternating logic.C. Chiou, W. Liang, H. Chang, J. Lin, and C. Lee. IET Circuits Devices Syst., 4 (5): 382-391 (2010)Hybrid Digit-Serial Multiplier for Shifted Polynomial Basis of GF(2 m ).C. Lee, W. Lee, C. Chiou, J. Pan, and C. Ni. ICGEC, volume 238 of Advances in Intelligent Systems and Computing, page 359-368. Springer, (2013)Novel Mastrovito Multiplier over GF(2m) Using Trinomial.C. Chiou, J. Lin, C. Lee, and C. Ma. ICGEC, page 237-242. IEEE Computer Society, (2011)Unified Parallel Systolic Multiplier Over GF(2m).C. Lee, Y. Chen, C. Chiou, and J. Lin. J. Comput. Sci. Technol., 22 (1): 28-38 (2007)Subquadratic Space-Complexity Parallel Systolic Multiplier Based on Karatsuba Algorithm and Block Recombination.C. Lee, C. Chiou, and J. Lin. ICGEC (2), volume 388 of Advances in Intelligent Systems and Computing, page 187-200. Springer, (2015)New Bit-Parallel Systolic Multiplier over GF(2m) Using The Modified Booth's Algorithm.C. Lee, Y. Chiu, and C. Chiou. APCCAS, page 610-613. IEEE, (2006)

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Disambiguation of "Chiou, Che Wun"

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Concurrent error detection in semi-systolic dual basis multiplier over GF(2m) using self-checking alternating logic.

Please choose a person to relate this publication to

Min-Ching Chiou

Irmgard Chiout

Emmanouil Chiou

Derek Chiou

Hannelore Chiout

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chiou, Che Wun"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Concurrent error detection in semi-systolic dual basis multiplier over GF(2m) using self-checking alternating logic.

Please choose a person to relate this publication to

Min-Ching Chiou

Irmgard Chiout

Emmanouil Chiou

Derek Chiou

Hannelore Chiout

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Concurrent error detection in semi-systolic dual basis multiplier over GF(2m) using self-checking alternating logic.