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Disambiguation of "Wen, Chia-Sheng"

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Hierarchical Multipartite Function Evaluation.

, , , and . IEEE Trans. Computers, 66 (1): 89-99 (2017)

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Sheng-Chia Chang

William Ockham's view on human capability. Uni Frankfurt Main, (2009)

Wen-Sheng Hsiao

Wen-Sheng Wang

Tung-sheng Sheng

Tung-sheng Sheng

 

Other publications of authors with the same name

Low-cost designs of rectangular to polar coordinate converters for digital communication., , , and . APCCAS, page 511-514. IEEE, (2012)Compression of Lookup Table for Piecewise Polynomial Function Evaluation., , and . DSD, page 279-284. IEEE Computer Society, (2014)An efficient pass-transistor-logic synthesizer using multiplexers and inverters only., , , and . ISCAS (3), page 2433-2436. IEEE, (2005)Hierarchical Multipartite Function Evaluation., , , and . IEEE Trans. Computers, 66 (1): 89-99 (2017)Asynchronous AHB bus interface designs in a multiple-clock-domain graphics system., , , and . APCCAS, page 408-411. IEEE, (2012)Design of Hardware Function Evaluators Using Low-Overhead Nonuniform Segmentation With Address Remapping., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 21 (5): 875-886 (2013)Efficient Pass-Transistor-Logic Synthesis for Sequential Circuits., , and . APCCAS, page 1631-1634. IEEE, (2006)Two-Level Hardware Function Evaluation Based on Correction of Normalized Piecewise Difference Functions., , and . IEEE Trans. Circuits Syst. II Express Briefs, 59-II (5): 292-296 (2012)Low Area/Power Synthesis Using Hybrid Pass Transistor/CMOS Logic Cells in Standard Cell-Based Design Environment., , and . IEEE Trans. Circuits Syst. II Express Briefs, 57-II (1): 21-25 (2010)Design of a programmable vertex processor in OpenGL ES 2.0 mobile graphics processing units., , , and . VLSI-DAT, page 1-4. IEEE, (2013)