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LVQ neural network SoC adaptable to different on-chip learning and recognition applications., , , , и . APCCAS, стр. 623-626. IEEE, (2014)Asynchronous Double-Frame-Exposure Binocular-Camera With Pixel-Level Pipeline Architecture for High-Speed Motion Tracking., , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 69 (6): 2967-2971 (2022)A 1920×1080 129fps 4.3pJ/pixel Stereo-Matching Processor for Pico Aerial Vehicles., , , , , и . ESSCIRC, стр. 345-348. IEEE, (2023)Live Demonstration: Supervised-learning-based Visual Quantification for Image Enhancement., , , , и . AICAS, стр. 1-2. IEEE, (2023)Live Demonstration: A Video Denoising Co-processor with Non-local Means Algorithm for FHD 30fps Image Sensor., , , , , , и . ISCAS, стр. 1. IEEE, (2024)Pixel-based pipeline hardware architecture for high-performance Haar-like feature extraction., , , , , и . APCCAS, стр. 611-612. IEEE, (2016)A Dynamic Codec with Adaptive Quantization for Convolution Neural Network., , , , и . ASICON, стр. 1-4. IEEE, (2023)A 139 fps pixel-level pipelined binocular stereo vision accelerator with region-optimized semi-global matching., , , , , , , , , и . A-SSCC, стр. 1-3. IEEE, (2021)Post-Processing Refinement for Semi-Global Matching Algorithm Based on Real-Time FPGA., , , , , , и . SOCC, стр. 1-5. IEEE, (2022)A Reconfigurable Matrix Multiplication Coprocessor with High Area and Energy Efficiency for Visual Intelligent and Autonomous Mobile Robots., , , , , , , , , и . A-SSCC, стр. 1-3. IEEE, (2021)