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153 FSRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHZ Ring-LC-Hybrid Injection-Locked Clock Multiplier.

S. Choi, S. Yoo, Y. Lee, Y. Jo, J. Lee, Y. Lim, and J. Choi. VLSI Circuits, page 185-186. IEEE, (2018)

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Jo Baier

Changyeon Jo

Il Jo

Jó Ueyama

Sungho Jo

Other publications of authors with the same name

32.4 A 104fsrms-Jitter and -61dBc-Fractional Spur 15GHz Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancelation Technique.J. Kim, Y. Jo, Y. Lim, T. Seong, H. Park, S. Yoo, Y. Lee, S. Choi, and J. Choi. ISSCC, page 448-450. IEEE, (2021)A 135fsrms-Jitter 0.6-to-7.7GHz LO Generator Using a Single LC-VCO-Based Subsampling PLL and a Ring-Oscillator-Based Sub-Integer-N Frequency Multiplier.Y. Jo, J. Kim, Y. Shin, C. Hwang, H. Park, and J. Choi. ISSCC, page 76-77. IEEE, (2023)An autonomous lane-level road map building using low-cost sensors.Y. Jo, S. Han, D. Lee, K. Min, and J. Choi. ICMV, volume 11041 of SPIE Proceedings, page 1104129. SPIE, (2018)Real-time road surface marking detection from a bird's-eye view image using convolutional neural networks.J. Kang, Y. Jo, D. Lee, S. Han, K. Min, and J. Choi. ICMV, volume 11433 of SPIE Proceedings, page 1143327. SPIE, (2019)17.8 A 170MHz-Lock-In-Range and -253dB-FoMjitter 12-to-14.5GHz Subsampling PLL with a 150µW Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator.Y. Lim, J. Kim, Y. Jo, J. Bang, S. Yoo, H. Park, H. Yoon, and J. Choi. ISSCC, page 280-282. IEEE, (2020)Robust Ego-motion Estimation and Map Matching Technique for Autonomous Vehicle Localization with High Definition Digital Map.S. Han, J. Kang, Y. Jo, D. Lee, and J. Choi. ICTC, page 630-635. IEEE, (2018)10.5 A 76 fsrms- Jitter and -65dBc- Fractional-Spur Fractional-N Sampling PLL Using a Nonlinearity-Replication Technique.Y. Shin, J. Lee, J. Kim, Y. Jo, and J. Choi. ISSCC, page 196-198. IEEE, (2024)A Wide-Lock-In-Range and Low-Jitter 12-14.5 GHz SSPLL Using a Low-Power Frequency-Disturbance-Detecting and Correcting Loop.Y. Lim, J. Kim, Y. Jo, J. Bang, and J. Choi. IEEE J. Solid State Circuits, 57 (2): 480-491 (2022)153 FSRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHZ Ring-LC-Hybrid Injection-Locked Clock Multiplier.S. Choi, S. Yoo, Y. Lee, Y. Jo, J. Lee, Y. Lim, and J. Choi. VLSI Circuits, page 185-186. IEEE, (2018)An External Capacitorless Low-Dropout Regulator With High PSR at All Frequencies From 10 kHz to 1 GHz Using an Adaptive Supply-Ripple Cancellation Technique.Y. Lim, J. Lee, S. Park, Y. Jo, and J. Choi. IEEE J. Solid State Circuits, 53 (9): 2675-2685 (2018)

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Disambiguation of "Jo, Yongwoo"

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153 FSRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHZ Ring-LC-Hybrid Injection-Locked Clock Multiplier.

Please choose a person to relate this publication to

Jo Baier

Changyeon Jo

Il Jo

Jó Ueyama

Sungho Jo

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Jo, Yongwoo"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 153 FSRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHZ Ring-LC-Hybrid Injection-Locked Clock Multiplier.

Please choose a person to relate this publication to

Jo Baier

Changyeon Jo

Il Jo

Jó Ueyama

Sungho Jo

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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153 FSRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHZ Ring-LC-Hybrid Injection-Locked Clock Multiplier.