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Signal Assignment to Hierarchical Memory Organizations for Embedded Multidimensional Signal Processing Systems.

, , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (9): 1304-1317 (2009)

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Memory Size Computation for Real-Time Multimedia Applications Based on Polyhedral Decomposition., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (12): 3378-3386 (2006)Computation of the Minimum Data Storage for Multi-Dimensional Signal Processing., , and . ICASSP (2), page 25-28. IEEE, (2007)Mapping multi-dimensional signals into hierarchical memory organizations., , and . DATE, page 385-390. EDA Consortium, San Jose, CA, USA, (2007)Computation of Storage Requirements for Multi-Dimensional Signal Processing Applications., , and . IEEE Trans. Very Large Scale Integr. Syst., 15 (4): 447-460 (2007)Design space exploration for low-power memory systems in embedded signal processing applications., , , and . RTCSA, page 92-100. IEEE Computer Society, (2013)Parallel algorithm mapping to memory multidimensional signals., , and . LASCAS, page 295-298. IEEE, (2016)Efficient assignment algorithm for mapping multidimensional signals into the physical memory., , and . ICASSP, page 1409-1412. IEEE, (2008)Energy-aware scratch-pad memory partitioning for embedded systems., , , , and . ISQED, page 653-659. IEEE, (2014)Memory size computation for multimedia processing applications., , and . ASP-DAC, page 802-807. IEEE, (2006)Scratch-pad memory banking for energy reduction in embedded signal processing systems., , and . MWSCAS, page 844-847. IEEE, (2013)