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Energy optimization of tapered buffers for CMOS on-chip switching power converters.

G. Villar, E. Alarcón, J. Madrenas, F. Guinjoan, and A. Poveda. ISCAS (5), page 4453-4456. IEEE, (2005)

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Claudia Villar

Nicolas Villar

Gerard Spettel

Gerard Tangerding

Walter Gérard

Other publications of authors with the same name

Multi-mode controller CMOS integrated circuit for switching power converters.G. Villar, E. Alarcón, H. Martínez, E. Vidal, S. Porta, F. Guinjoan, and A. Poveda. ISCAS (5), page 4457-4460. IEEE, (2005)Hysteric controller for CMOS on-chip switching power converters.G. Villar, E. Alarcón, H. Martínez, E. Vidal, F. Guinjoan, S. Porta, and A. Poveda. ISCAS (5), page 552-555. IEEE, (2004)Averaging circuit for switching power converter control: a CMOS current-mode integrated implementation.G. Villar, E. Alarcón, H. Martínez, D. Biel, E. Vidal, and A. Poveda. ISCAS (5), page 269-272. IEEE, (2002)A design space exploration for integrated switching power converters.G. Villar, E. Alarcón, F. Guinjoan, and A. Poveda. ISCAS (3), page 304-307. IEEE, (2003)Automatic dead-time adjustment CMOS mixed-signal circuit for a DCM-operated 3-level switching power converter.G. Villar, E. Alarcón, F. Guinjoan, and A. Poveda. ISCAS, page 3053-3056. IEEE, (2008)Inductor-current zero-crossing detection mixed-signal CMOS circuit for a DCM-operated 3-level switching power converter.G. Villar, and E. Alarcón. ISCAS, page 2606-2609. IEEE, (2008)BIOSEG: a bioinspired vlsi analog system for image segmentation.J. Madrenas, J. Cosp, L. Oscar, E. Alarcón, E. Vidal, and G. Villar. ESANN, page 411-416. (2004)Predicting fast-scale instabilities in switching power converters: a ripple-based unified perspective.E. Alarcón, A. Aroudi, J. Martinez-Artega, G. Villar, F. Guinjoan, and A. Poveda. ISCAS, IEEE, (2006)Optimized design of MOS capacitors in standard CMOS technology and evaluation of their Equivalent Series Resistance for power applications.G. Villar, E. Alarcón, F. Guinjoan, and A. Poveda. ISCAS (3), page 451-454. IEEE, (2003)Selective similarity function for VLSI analog signal processing.J. Madrenas, D. Fernández, J. Cosp, E. Alarcón, E. Vidal, and G. Villar. ISCAS (4), page 3926-3929. IEEE, (2005)

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Disambiguation of "Villar, Gerard"

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Energy optimization of tapered buffers for CMOS on-chip switching power converters.

Please choose a person to relate this publication to

Claudia Villar

Nicolas Villar

Gerard Spettel

Gerard Tangerding

Walter Gérard

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Villar, Gerard"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Energy optimization of tapered buffers for CMOS on-chip switching power converters.

Please choose a person to relate this publication to

Claudia Villar

Nicolas Villar

Gerard Spettel

Gerard Tangerding

Walter Gérard

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Energy optimization of tapered buffers for CMOS on-chip switching power converters.