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RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks.

, , and . IACR Cryptol. ePrint Arch., (2023)

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Active Wire Fences for Multitenant FPGAs., , , and . DDECS, page 13-20. IEEE, (2023)Shared FPGAs and the Holy Grail: Protections against Side-Channel and Fault Attacks., , , and . DATE, page 1645-1650. IEEE, (2021)The Side-Channel Metric Cheat Sheet., , , , , and . IACR Cryptol. ePrint Arch., (2022)Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs., , , , , and . J. Hardw. Syst. Secur., 7 (2): 72-99 (September 2023)The Side-channel Metrics Cheat Sheet., , , , , and . ACM Comput. Surv., 55 (10): 216:1-216:38 (2023)Temperature Impact on Remote Power Side-Channel Attacks on Shared FPGAs., , , and . DATE, page 1-6. IEEE, (2023)RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks., , and . IACR Cryptol. ePrint Arch., (2023)Built-in Self-Evaluation of First-Order Power Side-Channel Leakage for FPGAs., , , and . FPGA, page 204-210. ACM, (2020)Improving First-Order Threshold Implementations of SKINNY., , , and . INDOCRYPT, volume 13143 of Lecture Notes in Computer Science, page 246-267. Springer, (2021)Are Cloud FPGAs Really Vulnerable to Power Analysis Attacks?, , , and . DATE, page 1007-1010. IEEE, (2020)