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A space- and energy-efficient code Compression/Decompression technique for coarse-grained reconfigurable architectures., , , , , , , , and . CGO, page 197-209. ACM, (2017)Automatic CUDA Code Synthesis Framework for Multicore CPU and GPU Architectures., , and . PPAM (1), volume 7203 of Lecture Notes in Computer Science, page 579-588. Springer, (2011)Worst-Case Response Time Analysis of a Synchronous Dataflow Graph in a Multiprocessor System with Real-Time Tasks., and . ACM Trans. Design Autom. Electr. Syst., 22 (2): 36:1-36:26 (2017)A Hybrid Performance Analysis Technique for Distributed Real-Time Embedded Systems., , and . CoRR, (2016)Schedule-aware performance estimation of communication architecture for efficient design space exploration., , and . CODES+ISSS, page 195-200. ACM, (2003)TensorRT-Based Framework and Optimization Methodology for Deep Learning Inference on Jetson Boards., , and . ACM Trans. Embed. Comput. Syst., 21 (5): 51:1-51:26 (September 2022)The 2017 Embedded Systems Week (ESWEEK)., and . IEEE Des. Test, 35 (1): 95-96 (2018)Energy Optimization for Latency- and Quality-Constrained Video Applications., and . IEEE Des. Test Comput., 21 (5): 358-366 (2004)Dynamic Behavior Specification and Dynamic Mapping for Real-Time Embedded Systems: HOPES Approach., , , , , and . ACM Trans. Embed. Comput. Syst., 13 (4s): 135:1-135:26 (2014)Prolog to the Section on Hardware/Software Codesign.. Proc. IEEE, 100 (Centennial-Issue): 1409-1410 (2012)