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An Energy-Efficient Deep Neural Network Training Processor with Bit-Slice-Level Reconfigurability and Sparsity Exploitation., , , , , , и . COOL CHIPS, стр. 1-3. IEEE, (2021)A DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation., , , , , , и . AICAS, стр. 501. IEEE, (2022)GPPU: A 330.4-μJ/ task Neural Path Planning Processor with Hybrid GNN Acceleration for Autonomous 3D Navigation., , , , , и . VLSI Technology and Circuits, стр. 1-2. IEEE, (2023)A 15.9 mW 96.5 fps Memory-Efficient 3D Reconstruction Processor with Dilation-based TSDF Fusion and Block-Projection Cache System., , , , и . ISCAS, стр. 1-5. IEEE, (2023)NeRF-Navi: A 93.6-202.9µJ/task Switchable Approximate-Accurate NeRF Path Planning Processor with Dual Attention Engine and Outlier Bit-Offloading Core., , , , , , , и . VLSI Technology and Circuits, стр. 1-2. IEEE, (2024)LNPU: A 25.3TFLOPS/W Sparse Deep-Neural-Network Learning Processor with Fine-Grained Mixed Precision of FP8-FP16., , , , , и . ISSCC, стр. 142-144. IEEE, (2019)HNPU: An Adaptive DNN Training Processor Utilizing Stochastic Dynamic Fixed-Point and Active Bit-Precision Searching., , , , , , и . IEEE J. Solid State Circuits, 56 (9): 2858-2869 (2021)A 0.82 μW CIS-Based Action Recognition SoC With Self-Adjustable Frame Resolution for Always-on IoT Devices., , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 68 (5): 1700-1704 (2021)Sibia: Signed Bit-slice Architecture for Dense DNN Acceleration with Slice-level Sparsity Exploitation., , , , и . HPCA, стр. 69-80. IEEE, (2023)DSPU: A 281.6mW Real-Time Depth Signal Processing Unit for Deep Learning-Based Dense RGB-D Data Acquisition with Depth Fusion and 3D Bounding Box Extraction in Mobile Platforms., , , , , , , и . ISSCC, стр. 510-512. IEEE, (2022)