Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

WFAsic: A High-Performance ASIC Accelerator for DNA Sequence Alignment on a RISC-V SoC., , , , , , , and . ICPP, page 392-401. ACM, (2023)DVINO: A RISC-V Vector Processor Implemented in 65nm Technology., , , , , , , , , and 33 other author(s). DCIS, page 1-6. IEEE, (2022)A 70-mu m Pitch 8-mu W Self-Biased Charge-Integration Active Pixel for Digital Mammography., , , and . IEEE Trans. Biomed. Circuits Syst., 5 (5): 481-489 (2011)QUETZAL: Vector Acceleration Framework for Modern Genome Sequence Analysis Algorithms., , , , , , , , , and 7 other author(s). ISCA, page 597-612. IEEE, (2024)Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology., , , , , , , , , and 38 other author(s). DCIS, page 1-6. IEEE, (2023)VAQUERO: A Scratchpad-based Vector Accelerator for Query Processing., , , , , , , and . HPCA, page 1289-1302. IEEE, (2023)An Academic RISC-V Silicon Implementation Based on Open-Source Components., , , , , , , , , and 24 other author(s). DCIS, page 1-6. IEEE, (2020)A 128× 128-pix 4-kfps 14-bit Digital-Pixel PbSe-CMOS Uncooled MWIR Imager., , , , , , , and . ISCAS, page 1-5. IEEE, (2018)Highly linear integrate-and-fire modulators with soft reset for low-power high-speed imagers., , , , and . ISCAS, page 1-4. IEEE, (2017)Adaptable Register File Organization for Vector Processors., , , , , , , , and . HPCA, page 786-799. IEEE, (2022)