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Disambiguation of "Yeh, Jen-Chieh"

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System Performance Analyses on PAC Duo ESL Virtual Platform.

, , , , , and . IIH-MSP, page 406-409. IEEE Computer Society, (2009)

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Shih-Jen Yeh

Jen-Jen Lin

Chiao Yeh

Teshome Yehualaeshet

Su-Ying Yeh

 

Other publications of authors with the same name

System power analysis with DVFS on ESL virtual platform., , , , and . SoCC, page 93-98. IEEE, (2011)A Cycle Count Accurate TLM bus modeling approach., , , , and . VLSI-DAT, page 1-4. IEEE, (2013)An accurate system architecture refinement methodology with mixed abstraction-level virtual platform., , and . DATE, page 568-573. IEEE Computer Society, (2010)Processor and DRAM integration by TSV-based 3-D stacking for power-aware SOCs., , , , and . ASP-DAC, page 429-434. IEEE, (2013)PowerDepot: integrating IP-based power modeling with ESL power analysis for multi-core SoC designs., , , , , , and . DAC, page 47-52. ACM, (2011)Heterogeneous Multi-core SoC Implementation with System-Level Design Methodology., , , and . HPCC, page 851-856. IEEE, (2011)A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy., , , , , , and . ITC, page 393-402. IEEE Computer Society, (2003)Full System Simulation and Verification Framework., , , , , , , and . IAS, page 165-168. IEEE Computer Society, (2009)Automatic Generation of Memory Built-in Self-Test Cores for System-on-Chip., , , , , and . Asian Test Symposium, page 91-96. IEEE Computer Society, (2001)A Simulator for E aluating Redundancy Analysis Algorithms of Repairable Embedded Memories., , , and . IOLTW, page 262-. IEEE Computer Society, (2002)