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A reconfigurable architecture for real-time prediction of neural activity., , , , и . ISCAS, стр. 1869-1872. IEEE, (2013)A σδ modulator using gain-Boost Class-C Inverter for Audio Applications., , , , , и . Journal of Circuits, Systems, and Computers, (2013)Reconfigurable Number Theoretic Transform architectures for cryptographic applications., , , и . FPT, стр. 308-311. IEEE, (2010)Automating custom-precision function evaluation for embedded processors., , , , и . CASES, стр. 22-31. ACM, (2005)Compact Code-Based Signature for Reconfigurable Devices With Side Channel Resilience., , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 67-I (7): 2305-2316 (2020)Customising Hardware Designs for Elliptic Curve Cryptography., , и . SAMOS, том 3133 из Lecture Notes in Computer Science, стр. 274-283. Springer, (2004)An Efficient Application Specific Instruction Set Processor (ASIP) for Tensor Computation., , и . ASAP, стр. 37. IEEE, (2019)A hardware-based computational platform for Generalized Laguerre-Volterra MIMO model for neural activities., , , , , и . EMBC, стр. 7282-7285. IEEE, (2011)Hydrate: Hybrid Reconfigurable Architecture Expressions., , , и . FPT, стр. 1-4. IEEE, (2011)An FPGA-based re-configurable 24-bit 96kHz sigma-delta audio DAC., , , , и . FPT, стр. 110-117. IEEE, (2003)