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Verlustleistungsreduzierung bei dynamischen TSPC-Schaltungstechniken.

, , , and . GI Jahrestagung (1), volume P-67 of LNI, page 450. GI, (2005)

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Mitigation of aging effects through selective time-borrowing and alternative path activation., and . SBCCI, page 210-216. ACM, (2017)Algorithm for Fast Statistical Timing Analysis., , and . SoC, page 1-4. IEEE, (2007)Twin logic gates: improved logic reliability by redundancy concerning gate oxide breakdown, , , , and . SBCCI '09: Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design, page 1--6. New York, NY, USA, ACM, (2009)Verlustleistungsreduzierung bei dynamischen TSPC-Schaltungstechniken., , , and . GI Jahrestagung (1), volume P-67 of LNI, page 450. GI, (2005)Algorithms for Leakage Reduction with Dual Threshold Design Techniques., , , , and . SoC, page 1-4. IEEE, (2006)Pipelined successive approximation conversion (PSAC) with error correction for a CMOS ophthalmic sensor., and . SBCCI, ACM, (2009)Verification for Field-coupled Nanocomputing Circuits., , , , and . DAC, page 1-6. IEEE, (2020)HAMBug: A Hybrid CPU-FPGA System to Detect Race Conditions., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (9): 3158-3162 (2021)fiction: An Open Source Framework for the Design of Field-coupled Nanocomputing Circuits., , , , and . CoRR, (2019)SAT-Hard: A Learning-Based Hardware SAT-Solver., , , , and . DSD, page 74-81. IEEE, (2019)