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CRFlex: A Flexible and Configurable Cryptographic Hardware Accelerator for AES Block Cipher Modes.

, , , , , , and . ApplePies, volume 866 of Lecture Notes in Electrical Engineering, page 31-38. Springer, (2021)

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Cycle-Accurate Verification of the Cryptographic Co-Processor for the European Processor Initiative., , , , , and . ApplePies, volume 1110 of Lecture Notes in Electrical Engineering, page 378-385. Springer, (2023)CRFlex: A Flexible and Configurable Cryptographic Hardware Accelerator for AES Block Cipher Modes., , , , , , and . ApplePies, volume 866 of Lecture Notes in Electrical Engineering, page 31-38. Springer, (2021)Integration of Twin Models in UVM Verification IPs for Space Telecommunication Systems., , , and . IEEE Access, (2024)Architectural Implications for Inference of Graph Neural Networks on CGRA-based Accelerators., , , and . PRIME, page 373-376. IEEE, (2022)Design of a SpaceFibre High-Speed Satellite Interface ASIC., , , , and . ApplePies, volume 627 of Lecture Notes in Electrical Engineering, page 483-488. Springer, (2019)A SpaceFibre multi lane codec System on a Chip: enabling technology for low cost satellite EGSE., , , and . PRIME, page 173-176. IEEE, (2018)The U-PHOS experience within the ESA student REXUS/BEXUS programme: A real space hands-on opportunity., , , , , , , , , and 17 other author(s). EDUCON, page 852-855. IEEE, (2017)A RISC-V Post Quantum Cryptography Instruction Set Extension for Number Theoretic Transform to Speed-Up CRYSTALS Algorithms., , , , , and . IEEE Access, (2021)A Novel Parallel 8B/10B Encoder: Architecture and Comparison with Classical Solution., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 101-A (7): 1120-1122 (2018)A PXI Based Implementation of a TLK2711 Equivalent Interface., , , and . ApplePies, page 407-413. Springer, (2018)