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Disambiguation of "Uysal, Necati"

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DP-MAP: Towards Resistive Dot-Product Engines with Improved Precision.

, , , and . ICCAD, page 151:1-151:9. IEEE, (2020)

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Erkan Uysal

Necati Kura

Mehmet Uysal

Necati Iyikan

Necati Çakir

 

Other publications of authors with the same name

DP-MAP: Towards Resistive Dot-Product Engines with Improved Precision., , , and . ICCAD, page 151:1-151:9. IEEE, (2020)Representable Matrices: Enabling High Accuracy Analog Computation for Inference of DNNs using Memristors., , , and . ASP-DAC, page 538-543. IEEE, (2020)XMAP: Programming Memristor Crossbars for Analog Matrix-Vector Multiplication: Toward High Precision Using Representable Matrices., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (6): 1827-1841 (2022)Latency constraint guided buffer sizing and layer assignment for clock trees with useful skew., , and . ASP-DAC, page 761-766. ACM, (2019)Computational Restructuring: Rethinking Image Processing using Memristor Crossbar Arrays., , and . DATE, page 1594-1597. IEEE, (2020)STAT: Mean and Variance Characterization for Robust Inference of DNNs on Memristor-based Platforms., , and . ACM Great Lakes Symposium on VLSI, page 339-342. ACM, (2019)OCV guided clock tree topology reconstruction., and . ASP-DAC, page 494-499. IEEE, (2018)An OCV-Aware Clock Tree Synthesis Methodology., and . ICCAD, page 1-9. IEEE, (2021)Redundant Neurons and Shared Redundant Synapses for Robust Memristor-based DNNs with Reduced Overhead., , , and . ACM Great Lakes Symposium on VLSI, page 339-344. ACM, (2020)Synthesis of Clock Networks with a Mode Reconfigurable Topology and No Short Circuit Current., , and . ISPD, page 103-110. ACM, (2020)