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Process Complexity and Cost Considerations of Multi-Layer Die Stacks., , , , , , , , , и 5 other автор(ы). 3DIC, стр. 1-6. IEEE, (2019)Importance of alignment control during permanent bonding and its impact on via-last alignment for high density 3D interconnects., , , , , , , , , и . 3DIC, стр. 1-5. IEEE, (2016)High-density and low-leakage novel embedded 3D MIM capacitor on Si interposer., , , , , , , и . 3DIC, стр. 1-4. IEEE, (2016)Comparative study of 3D stacked IC and 3D interposer integration: Processing and assembly challenges., , , , , , , и . 3DIC, стр. 1-7. IEEE, (2014)Continuity and reliability assessment of a scalable 3×50μm and 2×40μm via-middle TSV module., , , , , , , , , и 3 other автор(ы). 3DIC, стр. 1-4. IEEE, (2016)Thermal experimental and modeling analysis of high power 3D packages., , , , , и . ICICDT, стр. 1-4. IEEE, (2015)Impact of via density and passivation thickness on the mechanical integrity of advanced Back-End-Of-Line interconnects., , , , , , , , , и 1 other автор(ы). Microelectron. Reliab., (2017)Extreme wafer thinning optimization for via-last applications., , , , , , , , , и 3 other автор(ы). 3DIC, стр. 1-5. IEEE, (2016)Triple-Layering Technology for Pixel-Parallel CMOS Image Sensors Developed by Hybrid Bonding of SOI Wafers., , , , , , , , , и 2 other автор(ы). 3DIC, стр. 1-4. IEEE, (2019)