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The impact of cache inclusion policies on cache management techniques., and . MEMSYS, page 428-438. ACM, (2019)Combining Edge Vector and Event Counter for Time-Dependent Power Behavior Characterization., , and . Trans. High Perform. Embed. Archit. Compil., (2009)Whisper: Profile-Guided Branch Misprediction Elimination for Data Center Applications., , , , , , and . MICRO, page 19-34. IEEE, (2022)Insertion and promotion for tree-based PseudoLRU last-level caches.. MICRO, page 284-296. ACM, (2013)Fast Path-Based Neural Branch Prediction.. MICRO, page 243-252. IEEE Computer Society, (2003)The Camino Compiler infrastructure., , , and . SIGARCH Comput. Archit. News, 33 (5): 3-8 (2005)Reducing network-on-chip energy consumption through spatial locality speculation., , , , and . NOCS, page 233-240. ACM/IEEE Computer Society, (2011)Controlling the Power and Area of Neural Branch Predictors for Practical Implementation in High-Performance Processors., and . SBAC-PAD, page 55-62. IEEE Computer Society, (2006)Flexible associativity for DRAM caches., , , , and . CF, page 88-96. ACM, (2018)B-Fetch: Branch Prediction Directed Prefetching for Chip-Multiprocessors., , , , , and . MICRO, page 623-634. IEEE Computer Society, (2014)