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Junction-Level Thermal Analysis of 3-D Integrated Circuits Using High Definition Power Blurring., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (5): 676-689 (2012)Thermal effects of heterogeneous interconnects on InP / GaN / Si diverse integrated circuits., , , and . 3DIC, page 1-3. IEEE, (2014)Dynamic electrothermal simulation of three-dimensional integrated circuits using standard cell macromodels., , , , , , , , , and 1 other author(s). IET Circuits Devices Syst., 6 (1): 35-44 (2012)Fast dynamic simulation of VLSI circuits using reduced order compact macromodel of standard cells., , , and . BMAS, page 75-80. IEEE, (2010)Thermal simulation of heterogeneous GaN/ InP/silicon 3DIC stacks., , , , , , and . 3DIC, page TS10.2.1-TS10.2.4. IEEE, (2015)Review of Hybrid Integration Techniques for Integrating III-V Onta Silicon., , , and . 3DIC, page 1-7. IEEE, (2023)Characterization of the mechanical stress impact on device electrical performance in the CMOS and III-V HEMT/HBT heterogeneous integration environment., , , , and . 3DIC, page TS8.27.1-TS8.27.4. IEEE, (2015)Vertical Stack Thermal Characterization of Heterogeneous Integration and Packages., , , , and . 3DIC, page 1-3. IEEE, (2019)