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Eventor: an efficient event-based monocular multi-view stereo accelerator on FPGA platform.

M. Li, J. Yang, Y. Qi, M. Dong, Y. Yang, R. Liu, W. Pan, B. Yu, and W. Zhao. DAC, page 331-336. ACM, (2022)

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Yang Yang

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Bulkyflip: A NAND-SPIN-Based Last-Level Cache With Bandwidth-Oriented Write Management Policy.B. Wu, W. Zhao, X. Hu, P. Dai, Z. Wang, C. Wang, Y. Wang, J. Yang, Y. Cheng, D. Liu and 1 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 67-I (1): 108-120 (2020)Computing-in-Memory Architecture Based on Field-Free SOT-MRAM with Self-Reference Method.C. Wang, Z. Wang, Y. Xu, J. Yang, Y. Zhang, and W. Zhao. ISCAS, page 1-4. IEEE, (2020)A Scalable Pipelined Dataflow Accelerator for Object Region Proposals on FPGA Platform.W. Fu, J. Yang, P. Dai, Y. Chen, and W. Zhao. FPT, page 346-349. IEEE, (2018)eSLAM: An Energy-Efficient Accelerator for Real-Time ORB-SLAM on FPGA Platform.R. Liu, J. Yang, Y. Chen, and W. Zhao. DAC, page 193. ACM, (2019)SR-WTA: Skyrmion Racing Winner-Takes-All Module for Spiking Neural Computing.B. Pan, K. Wang, X. Chen, J. Bai, J. Yang, Y. Zhang, and W. Zhao. ISCAS, page 1-5. IEEE, (2019)Generative adversarial network based scalable on-chip noise sensor placement.J. Liu, Y. Ding, J. Yang, U. Schlichtmann, and Y. Shi. SoCC, page 239-242. IEEE, (2017)A Novel Approach on Entity Linking for Encyclopedia Infoboxes.X. Li, J. Yang, R. Zhang, and H. Ma. CCKS, volume 957 of Communications in Computer and Information Science, page 103-115. Springer, (2018)An overview on memristor crossabr based neuromorphic circuit and architecture.Z. Li, C. Liu, Y. Wang, B. Yan, C. Yang, J. Yang, and H. Li. VLSI-SoC, page 52-56. IEEE, (2015)Hardware-Aware Graph Neural Network Automated Design for Edge Computing Platforms.A. Zhou, J. Yang, Y. Qi, Y. Shi, T. Qiao, W. Zhao, and C. Hu. DAC, page 1-6. IEEE, (2023)Exploiting Near-Memory Processing Architectures for Bayesian Neural Networks Acceleration.Y. Zhao, J. Yang, X. Jia, X. Wang, Z. Wang, W. Kang, Y. Zhang, and W. Zhao. ISVLSI, page 203-206. IEEE, (2019)

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Disambiguation of "Yang, Jianlei"

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Eventor: an efficient event-based monocular multi-view stereo accelerator on FPGA platform.

Please choose a person to relate this publication to

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Yang, Jianlei"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Eventor: an efficient event-based monocular multi-view stereo accelerator on FPGA platform.

Please choose a person to relate this publication to

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Other publications of authors with the same name

Disambiguation

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Eventor: an efficient event-based monocular multi-view stereo accelerator on FPGA platform.