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Disambiguation of "Zhang, Longbing"

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An Efficient Polarity Optimization Approach for Fixed Polarity Reed-Muller Logic Circuits Based on Novel Binary Differential Evolution Algorithm.

, , , , , , , , , , and . NPC, volume 10578 of Lecture Notes in Computer Science, page 118-121. Springer, (2017)

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Zhang Zhang

Meng Zhang

Methods and implementations of road-network matching. TU München, (2009)

Shuying Zhang

Fuqing Zhang

Xinming Zhang

 

Other publications of authors with the same name

CAOS: combined analysis with online sifting for dynamic compilation systems., , , and . Conf. Computing Frontiers, page 110-118. ACM, (2016)High-Utilization GPGPU Design for Accelerating GEMM Workloads: An Incremental Approach., , , , , and . ISCAS, page 1-5. IEEE, (2024)Using Direct Cache Access Combined with Integrated NIC Architecture to Accelerate Network Processing., , , and . HPCC-ICESS, page 509-515. IEEE Computer Society, (2012)Address-Locking Cache: A Flexible on Chip Memory Implementation for Embedded System., , , and . HPCC-ICESS, page 1516-1519. IEEE Computer Society, (2012)A Hybrid Hardware/Software Generated Prefetching Thread Mechanism on Chip Multiprocessors., , and . Euro-Par, volume 4128 of Lecture Notes in Computer Science, page 506-516. Springer, (2006)Stable Matching Scheduler for Single-ISA Heterogeneous Multi-core Processors., , , , , and . APPT, volume 9231 of Lecture Notes in Computer Science, page 45-59. Springer, (2015)An efficient and fast polarity optimization approach for mixed polarity Reed-Muller logic circuits., , , , , , , , , and . Frontiers Comput. Sci., 11 (4): 728-742 (2017)An Efficient Polarity Optimization Approach for Fixed Polarity Reed-Muller Logic Circuits Based on Novel Binary Differential Evolution Algorithm., , , , , , , , , and 1 other author(s). NPC, volume 10578 of Lecture Notes in Computer Science, page 118-121. Springer, (2017)Parallel program performance evaluation and their behavior analysis on an OpenMP cluster., , , and . CCGRID, page 508-514. IEEE Computer Society, (2004)Randomized Testing Framework for Dissecting NVIDIA GPGPU Thread Block-To-SM Scheduling Mechanisms., , , , , and . ICPADS, page 1843-1852. IEEE, (2023)