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Disambiguation of "Onodera, Hidetoshi"

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Statistical modeling of gate-delay variation with consideration of intra-gate variability.

, , and . ISCAS (5), page 513-516. IEEE, (2003)

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Kaoru Onodera

Keiichi Onodera

Hidetoshi Yamabe

 

Other publications of authors with the same name

An area effective forward/reverse body bias generator for within-die variability compensation., , and . A-SSCC, page 217-220. IEEE, (2011)On-chip temperature and process variation sensing using a reconfigurable Ring Oscillator., , and . VLSI-DAT, page 1-4. IEEE, (2017)Analysis and comparison of XOR cell structures for low voltage circuit design., , and . ISQED, page 703-708. IEEE, (2013)Variation-aware Flip-Flop energy optimization for ultra low voltage operation., , , and . SoCC, page 17-22. IEEE, (2014)Worst-case delay analysis considering the variability of transistors and interconnects., , and . ISPD, page 35-42. ACM, (2007)A functional memory type parallel processor for vector quantization., , , , and . ASP-DAC, page 665-666. IEEE, (1997)Post-layout transistor sizing for power reduction in cell-based design., and . ASP-DAC, page 359-365. ACM, (2001)Statistical gate delay model for Multiple Input Switching., , and . ASP-DAC, page 286-291. IEEE, (2008)Performance optimization by track swapping on critical paths utilizing random variations for FPGAS., , , and . FPL, page 503-506. IEEE, (2008)A Yield and Speed Enhancement Technique Using Reconfigurable Devices Against Within-Die Variations on the Nanometer Regime., , , , , , and . FPL, page 1-4. IEEE, (2006)