( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Coherence Protocol for Home Proxy Cache on RHiNET.

, , , и . PDPTA, CSREA Press, (2000)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Hideharu Umehara

Kyoko Amano

Yu Amano

Shun'ichi Amano

 

Другие публикации лиц с тем же именем

A Routing Algorithm for DS-WDM Ring., , и . Applied Informatics, стр. 562-565. IASTED/ACTA Press, (1999)A Preprocessing System of the EULASH: An Environment for Efficient use of Multiprocessors with Local Memory., , , , , и . Parallel and Distributed Computing and Systems, стр. 68-71. IASTED/ACTA Press, (1995)Total System Image of the Reconfigurable Machine WASMII., , , , и . PDPTA, стр. 1092-1096. CSREA Press, (1997)Performance Evaluation of 3-Dimensional MIN with Cache Consistency Maintenance Mechanism., , , , , и . PDPTA, стр. 1148-1154. CSREA Press, (2003)A Packet Forwarding Layer for DIMMnet and its Hardware Implementation., , , , , и . PDPTA, стр. 461-467. CSREA Press, (2005)Destination Bundle: A Routing Table Reduction Technique for Distributed Routing on Dependable Networks-on-Chips., , и . PDPTA, стр. 1343-1349. CSREA Press, (2005)Evaluation of MuCCRA-D: A Dynamically Reconfigurable Processor with Directly Interconnected PEs., , и . ERSA, стр. 215-221. CSREA Press, (2008)Implementation and Evaluation of Multicast Mechanism on Network Interface Plugged into a Memory Slot., , , , , и . PDPTA, стр. 787-793. CSREA Press, (2007)Acceleration of ART Algorithm on an FPGA Board with Xilinx SDAccel., и . CANDAR Workshops, стр. 280-284. IEEE, (2019)Foreword.. IEICE Trans. Inf. Syst., 95-D (2): 293 (2012)