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Power and performance aware memory-controller voting mechanism., , , , , and . ISQED, page 127-130. IEEE, (2018)Visual Exploration of Complex Time-Varying Graphs., and . IEEE Trans. Vis. Comput. Graph., 12 (5): 805-812 (2006)Poseidon: Efficient, Robust, and Practical Datacenter CC via Deployable INT., , , , , , and . NSDI, page 255-274. USENIX Association, (2023)Bolt: Sub-RTT Congestion Control for Ultra-Low Latency., , , and . NSDI, page 219-236. USENIX Association, (2023)Sundial: Fault-tolerant Clock Synchronization for Datacenters., , , , , , , , , and 1 other author(s). OSDI, page 1171-1186. USENIX Association, (2020)Designing closed-loop brain-machine interfaces with network of spiking neurons using MPC strategy., , , , and . ACC, page 2543-2548. IEEE, (2015)Optimal parameter estimation of the Izhikevich single neuron model using experimental inter-spike interval (ISI) data., , , , and . ACC, page 3586-3591. IEEE, (2010)A Two-Phased Approach to Training Data Generation for Shopping Query Intent Prediction., and . DL4SR@CIKM, volume 3317 of CEUR Workshop Proceedings, CEUR-WS.org, (2022)Mapping Vagus Nerve Stimulation Parameters to Cardiac Physiology using Long Short-term Memory Network., , , , and . EMBC, page 5477-5480. IEEE, (2021)An optimal control problem in closed-loop neuroprostheses., , , , and . CDC/ECC, page 53-58. IEEE, (2011)