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Disambiguation of "Hwang, Young-Ha"

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A 0.4-VIN, External-Capacitor-Free, Adaptive-Biased LDO with Look-Ahead Droop Reduction for Wake-up Features in Edge Devices.

, , and . ISOCC, page 275-276. IEEE, (2023)

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Won-Young Hwang

Ji-Young Hwang

Ha-Young Lee

Ha-Young Lee

Ha-Young Lee

 

Other publications of authors with the same name

PSP Model-Based Emulation Method for Geometry-Dependent Cryogenic Effects in 28-nm Bulk CMOS Technology., , , , and . ICEIC, page 1-3. IEEE, (2024)A 0.4-to-1 V Voltage Scalable ΔΣ ADC With Two-Step Hybrid Integrator for IoT Sensor Applications in 65-nm LP CMOS., , and . IEEE Trans. Circuits Syst. II Express Briefs, 64-II (12): 1417-1421 (2017)An Always-On 0.53-to-13.4 mW Power-Scalable Touchscreen Controller for Ultrathin Touchscreen Displays With Current-Mode Filter and Incremental Hybrid ΔΣ ADC., , , , , , and . ESSCIRC, page 313-316. IEEE, (2019)11.6 A 100-TRX-channel configurable 85-to-385Hz-frame-rate analog front-end for touch controller with highly enhanced noise immunity of 20Vpp., , , , and . ISSCC, page 210-211. IEEE, (2016)A compact 87.1-dB DR bandwidth-scalable delta-sigma modulator based on dynamic gain-bandwidth-boosting inverter for audio applications., , and . A-SSCC, page 293-296. IEEE, (2017)A 20 k-to-100kS/s Sub-µW 9.5b-ENOB Asynchronous SAR ADC for Energy-Harvesting Body Sensor Node SoCs in 0.18-µm CMOS., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (12): 1814-1818 (2018)Compact Characteristic Modeling of Cryo-CMOS Transistors Based on Commercial Process Design Kit., , , , and . ICEIC, page 1-3. IEEE, (2024)A 6b 48-GS/s Asynchronous 2b/cycle Time-Interleaved ADC in 28-nm CMOS., , , , , , and . ISOCC, page 127-128. IEEE, (2021)25.2 A 480mA Output-Capacitor-Free Synthesizable Digital LDO Using CMP- Triggered Oscillator and Droop Detector with 99.99% Current Efficiency, 1.3ns Response Time, and 9.8A/mm2 Current Density., , , and . ISSCC, page 382-384. IEEE, (2020)A 0.6-to-1V 10k-to-100kHz BW 11.7b-ENOB Noise-Shaping SAR ADC for IoT sensor applications in 28-nm CMOS., , , and . A-SSCC, page 247-248. IEEE, (2018)