Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

VLIW coprocessor for IEEE-754 quadruple-precision elementary functions.

Y. Lei, Y. Dou, L. Guo, J. Xu, J. Zhou, Y. Dong, and H. Li. ACM Trans. Archit. Code Optim., 10 (3): 12:1-12:22 (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Lei Lei

Lei Zhao

Lei Wang

Lei Shi

Other publications of authors with the same name

An Efficient Direct Memory Access (DMA) Controller for Scientific Computing Accelerators.S. Ma, L. Huang, Y. Lei, Y. Guo, and Z. Wang. ISCAS, page 1-5. IEEE, (2019)A Fine-grained Pipelined Implementation of the LINPACK Benchmark on FPGAs.G. Wu, Y. Dou, Y. Lei, J. Zhou, M. Wang, and J. Jiang. FCCM, page 183-190. IEEE Computer Society, (2009)Platform-Adaptive High-Throughput Surveillance Video Condensation on Heterogeneous Processor Clusters.P. Qiao, T. Li, Y. Dou, Y. Lei, H. Luo, and C. Jin. APPT, volume 10561 of Lecture Notes in Computer Science, page 1-13. Springer, (2017)Area and throughput trade-offs in design of arithmetic encoder for JPEG2000.B. Li, Y. Dou, and Y. Lei. APCCAS, page 316-319. IEEE, (2008)Hybrid-Mode Floating-Point FPGA CORDIC Co-processor.J. Zhou, Y. Dou, Y. Lei, and Y. Dong. ARC, volume 4943 of Lecture Notes in Computer Science, page 254-259. Springer, (2008)Double Precision Hybrid-Mode Floating-Point FPGA CORDIC Co-processor.J. Zhou, Y. Dou, Y. Lei, J. Xu, and Y. Dong. HPCC, page 182-189. IEEE Computer Society, (2008)FPGA SAR Processor with Window Memory Accesses.Y. Dou, J. Zhou, Y. Lei, and X. Zhou. ASAP, page 95-100. IEEE Computer Society, (2007)FPGA accelerating three QR decomposition algorithms in the unified pipelined framework.Y. Dou, J. Zhou, X. Chen, Y. Lei, and J. Xu. FPL, page 410-416. IEEE, (2009)Design and Implementation of the Parameterized Multi-Standard High-Throughput Radix-4 Viterbi Decoder on FPGA.R. Li, Y. Dou, Y. Lei, S. Ni, and S. Guo. IEICE Trans. Commun., 95-B (5): 1602-1611 (2012)Efficient Large-Scale 1D FFT Vectorization on Multi-Core Vector Accelerator.Z. Liu, X. Tian, X. Chen, Y. Lei, and M. Liao. HPCC/SmartCity/DSS, page 484-491. IEEE, (2019)

BibSonomy

Disambiguation of "Lei, Yuanwu"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

VLIW coprocessor for IEEE-754 quadruple-precision elementary functions.

Please choose a person to relate this publication to

Lei Lei

Lei Lei

Lei Zhao

Lei Wang

Lei Shi

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Lei, Yuanwu"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML VLIW coprocessor for IEEE-754 quadruple-precision elementary functions.

Please choose a person to relate this publication to

Lei Lei

Lei Lei

Lei Zhao

Lei Wang

Lei Shi

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

VLIW coprocessor for IEEE-754 quadruple-precision elementary functions.