( en | de | ru )

 

Disambiguation of "Cheung, Peter Y. K."

Author of the publication

copydeleteadd this publication to your clipboard
Scalable structured data access by combining autonomous memory blocks.

, , and . FPT, page 457-460. IEEE, (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Mutlu Kocab y k

Giselle Cheung

Tobias Cheung

Alvin Cheung

Frank Cheung

 

Other publications of authors with the same name

Automating custom-precision function evaluation for embedded processors., , , , and . CASES, page 22-31. ACM, (2005)Dynamic voltage & frequency scaling with online slack measurement., , and . FPGA, page 65-74. ACM, (2014)Degradation in FPGAs: measurement and modelling., , , and . FPGA, page 229-238. ACM, (2010)Improved delay measurement method in FPGA based on transition probability., and . FPGA, page 163-172. ACM, (2011)Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research., , , and . FPL, volume 1304 of Lecture Notes in Computer Science, page 91-100. Springer, (1997)On the feasibility of early routing capacitance estimation for FPGAs., , and . FPL, page 234-239. IEEE, (2007)Concurrently optimizing FPGA architecture parameters and transistor sizing: Implications for FPGA design., , , and . FPT, page 54-61. IEEE Computer Society, (2009)Floating-point bitwidth analysis via automatic differentiation., , , , and . FPT, page 158-165. IEEE, (2002)Within-die delay variability in 90nm FPGAs and beyond., and . FPT, page 97-104. IEEE, (2006)A Digit-Serial Structure for Reconfigurable Multipliers., , and . FPL, volume 2147 of Lecture Notes in Computer Science, page 565-573. Springer, (2001)