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Design Optimization of Register File Throughput and Energy Using a Virtual Prototyping (ViPro) Tool.

, и . ISVLSI, стр. 535-540. IEEE Computer Society, (2016)

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Brian Calhoun

H -H Kaatz

Florian H H Giesert

Lobna H airall h

Albrecht H -H Meyer

 

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Sub-threshold Circuit Design with Shrinking CMOS Devices., , , и . ISCAS, стр. 2541-2544. IEEE, (2009)New category of ultra-thin notchless 6T SRAM cell layout topologies for sub-22nm., и . ISQED, стр. 425-430. IEEE, (2011)Serial sub-threshold circuits for ultra-low-power systems., и . ISLPED, стр. 27-32. ACM, (2009)Virtual prototyper (ViPro): an early design space exploration and optimization tool for SRAM designers., , , и . DAC, стр. 138-143. ACM, (2010)26.8 A 236nW -56.5dBm-sensitivity bluetooth low-energy wakeup receiver with energy harvesting in 65nm CMOS., , , , , , и . ISSCC, стр. 450-451. IEEE, (2016)A 10mV-input boost converter with inductor peak current control and zero detection for thermoelectric energy harvesting., , и . CICC, стр. 1-4. IEEE, (2014)A 745pA Hybrid Asynchronous Binary-Searching and Synchronous Linear-Searching Digital LDO with 3.8×105 Dynamic Load Range, 99.99% Current Efficiency, and 2mV Output Voltage Ripple., и . ISSCC, стр. 232-234. IEEE, (2019)A reverse write assist circuit for SRAM dynamic write VMIN tracking using canary SRAMs., , , , и . ISQED, стр. 1-8. IEEE, (2014)Optimizing energy efficient low-swing interconnect for sub-threshold FPGAs., , , и . FPL, стр. 1-4. IEEE, (2015)Using island-style bi-directional intra-CLB routing in low-power FPGAs., , , и . FPL, стр. 1-7. IEEE, (2015)