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Improved Microarchitecture Support for Dynamic Task Scheduling on Reconfigurable Architectures., , and . ERSA, page 182-188. CSREA Press, (2005)Modelling and Performance Evaluation of a National Scale Switchless Based Network., , , , , and . INTERWORKING, volume 1938 of Lecture Notes in Computer Science, page 337-347. Springer, (2000)A HW/SW partitioning algorithm for dynamically reconfigurable architectures., and . DATE, page 729. IEEE Computer Society, (2001)Configuration Prefetching for Non-deterministic Event Driven Multi-context Schedulers., and . FPL, volume 1896 of Lecture Notes in Computer Science, page 842-845. Springer, (2000)Power-performance trade-offs for reconfigurable computing., and . CODES+ISSS, page 116-121. ACM, (2004)Generic Software Framework for Adaptive Applications on FPGAs., , , , and . FCCM, page 55-62. IEEE Computer Society, (2009)Performance and Energy Analysis of Task-Level Graph Transformation Techniques for Dynamically Reconfigurable Architectures., and . FPL, page 563-567. IEEE, (2005)Software-programmable digital pre-distortion on the Zynq SoC., , , and . VLSI-SoC, page 288-289. IEEE, (2013)Heterogeneous tasking on SMP/FPGA SoCs: The case of OmpSs and the Zynq., , , , , , and . VLSI-SoC, page 290-291. IEEE, (2013)Multi-platform demonstrations using the Iris architecture for cognitive radio network testbeds., , , , , , , and . CrownCom, page 1-5. ICST / IEEE, (2010)