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Safety evaluation based on virtual prototypes: Fault injection with multi-level processor models.

, , and . ISIC, page 1-2. IEEE, (2016)

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Automatic generation of hierarchical placement rules for analog integrated circuits., , , and . ISPD, page 47-54. ACM, (2010)Emulation of an ASIC Power, Temperature and Aging Monitor System for FPGA Prototyping., , , and . IOLTS, page 220-225. IEEE, (2018)Post-route refinement for high-frequency PCBs considering meander segment alleviation., , , and . ACM Great Lakes Symposium on VLSI, page 323-324. ACM, (2013)RRAM-based Neuromorphic Computing: Data Representation, Architecture, Logic, and Programming., , , and . DSD, page 423-428. IEEE, (2022)Editorial., , , , and . Microelectron. Reliab., (2016)Synthesis-based methodology for high-speed multi-modulus divider., , and . SMACD, page 1-4. IEEE, (2016)PROTON: an automatic place-and-route tool for optical networks-on-chip., , , and . ICCAD, page 138-145. IEEE, (2013)Semi-Supervised Deep Learning for Microcontroller Performance Screening., , , , , and . ETS, page 1-6. IEEE, (2023)Relative-Scheduling-Based High-Level Synthesis for Flow-Based Microfluidic Biochips., , , , and . ICCAD, page 1-9. IEEE, (2021)PSION 2: Optimizing Physical Layout of Wavelength-Routed ONoCs for Laser Power Reduction., , and . ICCAD, page 43:1-43:9. IEEE, (2020)