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Design of True Random Number Generator Based on Multi-Stage Feedback Ring Oscillator., , , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (3): 1752-1756 (2022)Fortune: A New Fault-Tolerance TSV Configuration in Router-Based Redundancy Structure., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (10): 3182-3187 (2022)A novel in-field TSV repair method for latent faults., , , and . IEICE Electron. Express, 15 (23): 20180873 (2018)LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (10): 2938-2951 (2020)SCLCRL: Shuttling C-elements based Low-Cost and Robust Latch Design Protected against Triple Node Upsets in Harsh Radiation Environments., , , , , , , , and . DATE, page 1257-1262. IEEE, (2022)A Sextuple Cross-Coupled Dual-Interlocked-Storage-Cell based Multiple-Node-Upset Self-Recoverable Latch., , , , , , and . NANOARCH, page 1-6. IEEE, (2021)MRCO: A Multi-ring Convergence Oscillator-based High-Efficiency True Random Number Generator., , , , , , and . AsianHOST, page 1-6. IEEE, (2022)A 4NU-Recoverable and HIS-Insensitive Latch Design for Highly Robust Computing in Harsh Radiation Environments., , , , , , and . ACM Great Lakes Symposium on VLSI, page 301-306. ACM, (2021)A Hybrid DMR Latch to Tolerate MNU Using TDICE and WDICE., , , , , and . ATS, page 121-126. IEEE, (2018)A SEU Immune Flip-Flop with Low Overhead., , , , and . ML4CS (2), volume 12487 of Lecture Notes in Computer Science, page 56-65. Springer, (2020)