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Disambiguation of "San, Hao"

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A 2.8-V Multibit Complex Bandpass Delta-Sigma-AD Modulator in 0.18µm CMOS.

, , , , , , and . ASP-DAC, page 96-97. IEEE Computer Society, (2007)

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San San Lin

San San Hmwe

Wenjin Hao

Xiaofei Hao

San Thwin

 

Other publications of authors with the same name

An area-efficient 12-bit 1.25MS/s radix-value self-estimated non-binary ADC with relaxed requirements on analog components., , , , and . CICC, page 1-4. IEEE, (2014)A Low-voltage Non-binary Cyclic ADC using Fully Differential Ring Amplifier., , , , , , and . ISPACS, page 1-2. IEEE, (2021)ΔΣAD modulator for low power application., , , , , , , and . APCCAS, page 1232-1235. IEEE, (2008)A 2.8-V Multibit Complex Bandpass Delta-Sigma-AD Modulator in 0.18µm CMOS., , , , , , and . ASP-DAC, page 96-97. IEEE Computer Society, (2007)A 0.8V 14bit 62.5kSPS non-binary cyclic ADC using SOTB CMOS technology., , , , , and . ISPACS, page 1-2. IEEE, (2019)Experimental results of reconfigurable non-binary cyclic ADC., , , , , and . ISPACS, page 611-615. IEEE, (2017)A low-distortion delta-sigma modulator with ring amplifier and passive adder embedded SAR quantizer., and . ISPACS, page 299-302. IEEE, (2015)Reducing Spurious Output of Balanced Modulators by Dynamic Matching of I, Q Quadrature Paths., , , , , and . IEICE Trans. Electron., 88-C (6): 1290-1294 (2005)A 2nd-Order ΔΣAD Modulator Using Dynamic Analog Components with Simplified Operation Phase., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 101-A (2): 425-433 (2018)A 12-Bit 3.3MS/S pipeline cyclic ADC with correlated level shifting technique., , , , , , and . ISPACS, page 602-605. IEEE, (2017)