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Design and implementation of high-performance master/slave memory controller with microcontroller bus architecture.

S. Ramagundam, S. Das, S. Morton, S. Biswas, V. Groza, M. Assaf, and E. Petriu. I2MTC, page 10-15. IEEE, (2014)

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Atish Biswas

Koushik Biswas

Kajal Biswas

Biplab Biswas

Other publications of authors with the same name

A compact multispectral image capture unit for deployment on drones.E. Bokolonga, M. Hauhana, N. Rollings, D. Aitchison, M. Assaf, S. Das, S. Biswas, V. Groza, and E. Petriu. I2MTC, page 1-5. IEEE, (2016)Design and implementation of high-performance master/slave memory controller with microcontroller bus architecture.S. Ramagundam, S. Das, S. Morton, S. Biswas, V. Groza, M. Assaf, and E. Petriu. I2MTC, page 10-15. IEEE, (2014)A Novel Technique for Input Vector Compression in System-on-Chip Testing.S. Biswas, S. Das, and M. Assaf. ICIT, page 53-58. IEEE Computer Society, (2008)Compressed video watermarking technique.S. Biswas, T. Hasan, S. DasGupta, S. Das, V. Groza, E. Petriu, and M. Assaf. I2MTC, page 1790-1794. IEEE, (2013)Short duration voice data speaker recognition system using novel fuzzy vector quantization algorithm.S. Singh, M. Assaf, S. Das, S. Biswas, E. Petriu, and V. Groza. I2MTC, page 1-6. IEEE, (2016)Image processing based system for classification of vehicles for parking purposes.A. Kumar, M. Assaf, S. Das, S. Biswas, E. Petriu, and V. Groza. I2MTC, page 1326-1330. IEEE, (2015)Data compression using mixed cascade of nonlinear logic.S. Das, D. Shaw, S. Biswas, M. Assaf, S. Morton, I. Ozkarahan, E. Petriu, and V. Groza. I2MTC, page 1544-1549. IEEE, (2013)Designing elementary-tree space compressors using AND/NAND and XOR/XNOR combinations.N. Malan, S. Das, S. Biswas, M. Assaf, S. Morton, E. Petriu, and V. Groza. I2MTC, page 1408-1413. IEEE, (2015)An Optimized Tongue Drive System for Disabled Persons.K. Chand, K. Chand, R. Kumar, B. Sharma, M. Assaf, S. Das, V. Groza, E. Petriu, and S. Biswas. I2MTC, page 1-6. IEEE, (2021)An algorithm for generating prime implicants.S. Das, A. Amin, S. Biswas, M. Assaf, E. Petriu, and V. Groza. I2MTC, page 1-6. IEEE, (2016)

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Disambiguation of "Biswas, Satyendra N."

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Design and implementation of high-performance master/slave memory controller with microcontroller bus architecture.

Please choose a person to relate this publication to

n n n

Atish Biswas

Koushik Biswas

Kajal Biswas

Biplab Biswas

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Biswas, Satyendra N."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Design and implementation of high-performance master/slave memory controller with microcontroller bus architecture.

Please choose a person to relate this publication to

n n n

Atish Biswas

Koushik Biswas

Kajal Biswas

Biplab Biswas

Other publications of authors with the same name

Disambiguation

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URL
DOI
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APA
Chicago
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Design and implementation of high-performance master/slave memory controller with microcontroller bus architecture.