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An Industrial Approach to Core-Based System Chip Testing.. VLSI-SOC, volume 218 of IFIP Conference Proceedings, page 389-400. Kluwer, (2001)How Useful are the ITC 02 SoC Test Benchmarks?, and . IEEE Des. Test Comput., 19 (5): 120, 119 (2002)SOC test architecture design for efficient utilization of test bandwidth., and . ACM Trans. Design Autom. Electr. Syst., 8 (4): 399-429 (2003)Guest Editors' Introduction: Addressing the Challenges of Debug and Diagnosis., and . IEEE Des. Test Comput., 25 (3): 206-207 (2008)Conference Reports., , , , , and . IEEE Des. Test Comput., 23 (4): 262-265 (2006)Device-Aware Test for Back-Hopping Defects in STT-MRAMs., , , , , , , , and . DATE, page 1-6. IEEE, (2023)Characterization, Modeling and Test of Synthetic Anti-Ferromagnet Flip Defect in STT-MRAMs., , , , , and . ITC, page 1-10. IEEE, (2020)On Scan Chain Diagnosis for Intermittent Faults., , , and . Asian Test Symposium, page 47-54. IEEE Computer Society, (2009)IEEE Std 1500 Compliant Infrastructure forModular SOC Testing., , and . Asian Test Symposium, page 450. IEEE Computer Society, (2005)Automation of 3D-DfT Insertion., , , , , , and . Asian Test Symposium, page 395-400. IEEE Computer Society, (2011)