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Hybrid CMOS-TFET based register files for energy-efficient GPGPUs.

, , and . ISQED, page 112-119. IEEE, (2013)

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Process Variation Mitigation on Convolutional Neural Network Accelerator Architecture., , , and . ICCD, page 47-55. IEEE, (2019)Hybrid CMOS-TFET based register files for energy-efficient GPGPUs., , and . ISQED, page 112-119. IEEE, (2013)Combating the Reliability Challenge of GPU Register File at Low Supply Voltage., , , , , and . PACT, page 3-15. ACM, (2016)Bridging mobile device configuration to the user experience under budget constraint., , and . Pervasive Mob. Comput., (2019)Improving energy efficiency of mobile devices by characterizing and exploring user behaviors., , and . J. Syst. Archit., (2019)Eff-ECC: Protecting GPGPUs Register File With a Unified Energy-Efficient ECC Mechanism., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (7): 2080-2093 (2022)Improving the Performance of CNN Accelerator Architecture under the Impact of Process Variations., , , , and . ACM Trans. Design Autom. Electr. Syst., 28 (5): 85:1-85:21 (September 2023)Cost-effective soft-error protection for SRAM-based structures in GPGPUs., , and . Conf. Computing Frontiers, page 29:1-29:10. ACM, (2013)LoSCache: Leveraging Locality Similarity to Build Energy-Efficient GPU L2 Cache., , , and . DATE, page 1190-1195. IEEE, (2019)Energy-Efficient GPU L2 Cache Design Using Instruction-Level Data Locality Similarity., , , and . ACM Trans. Design Autom. Electr. Syst., 25 (6): 52:1-52:18 (2020)